A quick news piece on information coming out of Intel’s annual Investor Day in California. As confirmed to Ashraf Eassa by Intel at the event, Intel’s 8th Generation Core microarchitecture will remain on the 14nm node. This is an interesting development with the recent launch of Intel’s 7th Generation Core products being touted as the ‘optimization’ behind the new ‘Process-Architecture-Optimization’ three-stage cadence that had replaced the old ‘tick-tock’ cadence. With Intel stringing out 14nm (or at least, an improved variant of 14nm as we’ve seen on 7th Gen) for another generation, it makes us wonder where exactly Intel can promise future performance or efficiency gains on the design unless they start implementing microarchitecture changes.

Despite this, if you were to believe supposed ‘leaked’ roadmaps (which we haven’t confirmed from a second source as of yet), the 8th Generation product ‘Cannon Lake’ is more geared towards the Y and U part of Intel’s roadmap. This would ring true with a mobile first strategy that Intel has mirrored with recent generations such that the smaller, low power chips are off the production line for a new product first, however we'd also expect 10nm to also be in the smaller chips first too (as demonstrated at CES). Where Cannon Lake will end up in the desktop or enterprise segment however remains to be seen. To put something a bit more solid into this, Ashraf also mentioned words from Dr. Venkata ‘Murthy’ Renduchintala, VP and GM of Client and IoT:

‘Murthy referred to it at the event, process tech use will be ‘fluid’ based on segment’.

If one read too much into this, we may start seeing a blend of process nodes for different segments at the same time for different areas of the market. We already do have that to some extent with the mainstream CPUs and the HEDT/Xeon families, but this phrasing seems that we might get another split between consumer products or consumer and enterprise. We may get to a point where Intel's 'Gen' naming scheme for its CPUs covers two or more process node variants.

Speaking of the Enterprise segment, another bit of information has also surfaced, coming from a slide during a talk by Diane Bryant (EVP/GM of Data Center) and posted online by Ashraf. The slide contains the words ‘Data center first for next process node’

We can either talk about process node in terms of the ‘number’, either 14nm/10nm/7nm, or by variants within that process (high power, high efficiency). One might suspect that this means Intel is moving hard and fast with 10nm for Xeons and big computing projects, despite showing off 10nm silicon at CES earlier this year. That being said, it’s important to remember that the data center market is large, and includes high-density systems with many cores, such as Atom cores, and Intel did recently open up its 10nm foundry business to ARM Artisan IP projects. So while the slide does say ‘Data center first’, it might be referring to DC projects based on ARM IP in that segment rather than big 4-24+ core Xeons. At this stage of the game it is hard to tell.

On top of all this, Intel still has extreme confidence in its foundry business. An image posted by Dick James of Siliconics from the livestream shows Intel expects to have a three-year process node advantage when its competitors (Samsung, TSMC) start launching 10nm:

I’ve been brief with this news for a reason - at this point there are a lot of balls in the air with many different ways to take this information, and the Investor Day is winding down on talks and finishing with smaller 1-on-1 meetings. We may get further clarification on this news as the day goes on.

Update 1: On speaking with Diane Bryant, the 'data center gets new nodes first' is going to be achieved by using multiple small dies on a single package. But rather than use a multi-chip package as in previous multi-core products, Intel will be using EMIB as demonstrated at ISSCC: an MCP/2.5D interposer-like design with an Embedded Multi-Die Interconnect Bridge (EMIB).

An Intel Slide from ISSCC, via PC Watch

Initially EMIB was thought of as a technology relating to Intel's acquisition of Altera and potential future embedded FPGA designs, and given the slide above and comments made at the Investor Day, it seems there are other plans for this technology too. The benefit of using multiple smaller dies over a large monolithic 600mm2 die is typically related to cost and yield, however the EMIB technology also has to be up to par and there may be a latency or compatibility trade-off.

Source: Intel, @TMFChipFool

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  • nils_ - Wednesday, February 15, 2017 - link

    You're talking about Power 9 I believe? The problem here is that it's very hard to get the ecosystem going without affordable CPUs, it'll remain a niche product unless developers can actually get their hands on them.
  • revanchrist - Thursday, February 9, 2017 - link

    14nm Coffee Lake and 10nm Cannonlake?
  • Cygni - Thursday, February 9, 2017 - link

    That's what the leaked documents showed.

    That plus the discussion about using EMIB to cobble together smaller dies for server parts, as well as the fact that Intel let Fab 42 sit after billions in construction rather than installing 10nm production equipment, leads me to believe that 10nm has been a bit of a disaster for Intel. 14nm was obviously a struggle at first and things didn't get any easier it appears.
  • Morawka - Thursday, February 9, 2017 - link

    wow time to dump intel stock... they gonna be on 10nm for 4 years
  • ddriver - Thursday, February 9, 2017 - link

    TOMORROW - tick, tock, tock, tock, tock, tock, tock, tock, tock, tooooooooooooooooooock
  • smilingcrow - Friday, February 10, 2017 - link

  • BurntMyBacon - Friday, February 10, 2017 - link

    Looks like their next process node will be Dynamite!
    I'll see myself out.
  • Gondalf - Friday, February 10, 2017 - link

    Why not to dump your ASML stock instead???
    Do you really believe GloFo, TSMC, Samsung are better than Intel ?? No, all they are in a desperation state because these new fine nodes do not works correctly in production without EUV.

    Look at GloFo, it will stay on 14nm for other three years, Look at TSMC, their fake 7nm process will be a boutique low yields one that only Apple will want (if ever want it). Look at Samsung, their 10nm is a minor step over a very conservative 14nm and 7nm is only a dream three/four years late in the future. Not to mention all these foundries avoid to manufacture big dies under sub 14nm processes and GPUs will stay on 16nm for a lot.
  • name99 - Friday, February 10, 2017 - link

    What evidence do you have about TSMC? You're throwing random adjectives together, and you're not even doing it correctly. The node that is supposed to be "fake" and "only Apple wants" is 10nm --- that's what people like you were saying last year, that it will be a "light" node that's soon abandoned for 7nm.

    Meanwhile that supposedly despised 20nm TSMC node (where we heard the exact same thing) is doing just fine, serving a constituency that want the best they can get without going to FinFET and double-patterned metal.

    The problem you have is, in a way, the problem Intel has. You're both locked into a simplistic model of the world where only the leading edge counts.
    TSMC (and I expect the same is true of GloFo and Samsung, though I track them less closely), by serving a large range of constituencies, finds it hard to misfire. Any particular process has value for SOME sort of users, and can hang around for a long long time serving that particular set of use cases. But Intel is locked into a very PARTICULAR set of use cases, and so is much more constrained in how they can derive value from a process that doesn't exactly match their needs. Foundries are omnivores, Intel lives on a single type food and nothing else.

    Of course Intel is trying to become a foundry, but they seem so confused as to what the goals of this are that they are unlikely to be successful. (Are they willing to allow competitors to create products that are better than Intel? Would they allow Apple to produce an ARM SoC for Apple desktops? Would they allow AMD to use their foundry?).
    And apart from this confusion of goals, there are technical issues. The other foundries have a huge body of design material and standard cells with which customers are familiar. Intel provides the Intel way of doing things, which is not especially compelling when you are not part of that tradition. There's a reason they've had such limited foundry pick-up so far, and there seems no sign that that's going to change.
  • extide - Friday, February 10, 2017 - link

    Gondalf actually has some points here .. believe it or not. Firstly, everyone uses ASML gear to make this stuff, Intel, GloFo, TSMC, you name it. Also, TSMC has said they are going to NOT use any form of EUV for their first gen 7nm process -- which means it will be multi-patterned to kingdom come. We all know big die GPU's won't be coming first on new processes from here on out most likely..

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